Product Profile - ZL30146 - Zarlink Semiconductor Inc.

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ZL30146 PRODUCT PROFILE

SyncE SONET/SDH Line Card PLL

Product Status: Production

Overview
Technical Documents
Tools & Software
Applications
Packaging & availability
Support
Where to Buy

The ZL30146 OC-192/STM-64 PDH/SONET/SDH/Synchronous Ethernet Network Interface Synchronizer is a highly integrated device that provides timing for both PDH/SONET/SDH and Ethernet network interface cards.

Simplified Block Diagram

Features & Benefits

Synchronizes to standard telecom or Ethernet backplane clocks and provides jitter filtered output clocks for SONET/SDH, PDH and Ethernet network interface cards
Supports the requirements of ITU-T G.8262 for synchronous Ethernet Equipment slave Clocks
Meets the SONET/SDH jitter generation requirements up to OC-192/STM-64
Two independent DPLLs provides timing for the transmit path (backplane to line rate) and the receive path (recovered line rate to backplane)
Synchronizes to telecom reference clocks (2 kHz, N*8 kHz up to 77.76 MHz, 155.52 MHz) or to Ethernet reference clocks (25 MHz, 50 MHz, 62.5 MHz, 125 MHz)
Selectable loop bandwidth of 14 Hz, 28 Hz, 890 Hz, 3.5 Hz, 1.7 Hz, or 0.1 Hz
Supports automatic hitless reference switching and short term holdover during loss of reference inputs
Generates standard SONET/SDH clock rates (e.g., 19.44 MHz, 38.88 MHz, 77.76 MHz, 155.52 MHz, 622.08 MHz) or Ethernet clock rates (e.g., 25 MHz, 50 MHz, 125 MHz, 156.25 MHz, 312.5 MHz) for synchronizing Ethernet PHYs
Programmable output synthesizer to generate telecom clock frequencies from any multiple of 8 kHz up to 100 MHz (e.g., T1/E1, DS3/E3)
Generates several styles of output frame pulse with selectable pulse width, polarity, and frequency
Configurable input to output delay and output to output phase alignment
Configurable through a serial interface (SPI or I²C)
DPLLs can be configured to provide synchronous or asynchronous clock outputs