Product Profile - ZL30145 - Zarlink Semiconductor Inc.

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ZL30145 PRODUCT PROFILE

SyncE (10 GbE) SONET/SDH Rate Conversion and Jitter Attenuator PLL

Product Status: Production

Overview
Technical Documents
Tools & Software
Applications
Packaging & availability
Support
Where to Buy

The ZL30145 is a highly integrated device that provides timing for line cards. The DPLL automatically locks to one input reference and provides two synchronized output clocks for synchronizing SONET/SDH and Synchronous Ethernet line cards.

Simplified Block Diagram

Features & Benefits

Can be used in systems to support the requirements of ITU-T G.8262 for synchronous Ethernet Equipment slave Clocks (EEC option 1 and 2)
Meets jitter generation requirements of Telcordia GR-253-CORE for OC-192, OC-48, OC-12 and OC-3 rates
Meets jitter generation requirements of ITU-T G.813 for STM-64, STM-16, STM-4 and STM-1 rates
Synchronizes to standard telecom or Ethernet clock and provides jitter filtered output clock for SONET/SDH and Synchronous Ethernet line cards
Synchronizes to telecom reference clocks (2 kHz, N*8 kHz up to 77.76 MHz, 155.52 MHz) or to Ethernet reference clocks (25 MHz, 50 MHz, 62.5 MHz, 125 MHz)
Generates standard SONET/SDH clock rates (e.g., 19.44 MHz, 38.88 MHz, 77.76 MHz, 155.52 MHz, 622.08 MHz) or Ethernet clock rates (e.g., 25 MHz, 50 MHz, 125 MHz, 156.25 MHz, 312.5 MHz) for synchronizing Ethernet PHYs
Selectable loop bandwidth of 14 Hz, 28 Hz, or 890 Hz
Configurable through a serial interface (SPI or I²C)
DPLL can be configured to provide synchronous or asynchronous clock outputs
Supports IEEE 1149.1 JTAG Boundary Scan