Ottawa, Canada, July 18, 2007 -- Zarlink Semiconductor Inc. (NYSE/TSX:ZL) today announced that it is sampling a range of integrated analog/digital PLLs (phase-locked loops) that meet all Synchronous Ethernet timing requirements, including the latest recommendation from the ITU-T (International Telecommunications Union).

Consented in June 2007, the ITU-T G.8262 recommendation (former G.paclock) outlines the minimum performance requirements for timing devices used to synchronize networking equipment that uses Synchronous Ethernet. The recommendation defines PLL performance characteristics, including wander, jitter, phase transients, clock bandwidth, frequency accuracy and holdover.

"Zarlink is the first supplier to deliver single-chip devices meeting all Synchronous Ethernet timing requirements," said Darren Ladouceur, marketing manager with Zarlink's Timing and Synchronization product line. "Zarlink's single-chip Ethernet timing card and line card synchronizers allow equipment manufacturers to ease integration, reduce power and ensure compliance. As a result, customers can quickly and easily build next-generation networking equipment and retrofit existing products to support Synchronous Ethernet timing capabilities."

Synchronous Ethernet technology is being deployed in DSLAMs (digital subscriber line access multiplexers), routers, MSSPs (multi-service switching platforms), PON (passive optical network) and multi-service access equipment to enable voice, data, video and legacy services over a converged, high-bandwidth, Synchronous Ethernet link. Previously, service providers had to maintain dedicated T1/E1 or SONET/SDH links to support time-critical services over packet networks.

Sampling second-generation devices

Building on the previously released ZL30107 and ZL30120 Gigabit Ethernet line card synchronizers, Zarlink is now sampling its second generation of multi-rate, 1 GbE and 10 GbE analog/digital PLL products supporting all Ethernet frequencies with the option to support independent transmit and receive timing paths.

Zarlink's new Synchronous Ethernet products support both 1 GbE and 10 GbE frequencies or SONET/SDH frequencies. The devices also feature both single-ended and differential outputs.

Integrated dual PLLs in one package support transmit and receive timing paths, allowing the devices to seamlessly convert backplane and PHY clocks. In the transmit path the products support rate conversion from standard telecom or Ethernet frequencies and provide jitter attenuation to generate a low-jitter Ethernet clock for the PHY. In the receive path the products rate convert the Synchronous Ethernet recovered clocks to the backplane frequency, which then feeds back to the system timing card. In comparison, competing approaches would require multiple devices to implement transmit and receive timing paths.

Zarlink's Synchronous Ethernet products support multiple input references, hitless reference switching, holdover, low-jitter Ethernet outputs and programmable clock and frame pulse outputs. Zarlink's timing card products also provide wander filtering meeting G.8262 requirements. The products combine leading performance and features to ease system integration, improve power dissipation and lower component count and reduce footprint requirements.

Availability

Zarlink's expanded family of Synchronous Ethernet timing products is now sampling. Zarlink is also sampling new devices that combine Synchronous Ethernet and IEEE-1588 functionality for applications that require accurate timing frequencies and time-of-day capabilities.

For information on Zarlink's new Synchronous Ethernet timing products, contact your local sales representative. For more on Zarlink's Timing and Synchronization expertise, visit: http://timing.zarlink.com/.

About Zarlink Semiconductor

For over 30 years, Zarlink Semiconductor has delivered semiconductor solutions that drive the capabilities of voice, enterprise, broadband and wireless communications. The Company's success is built on its technology strengths including voice and data networks, optoelectronics and ultra low-power communications. For more information, visit http://www.zarlink.com/.

Shareholders and other individuals wishing to receive, free of charge, copies of the reports filed with the U.S. Securities and Exchange Commission and Regulatory Authorities, should visit the Company's web site at http://www.zarlink.com/ or contact Investor Relations.

Certain statements in this press release constitute forward-looking statements within the meaning of the Private Securities Litigation Reform Act of 1995. Such forward-looking statements involve known and unknown risks, uncertainties, and other factors which may cause the actual results, performance or achievements of the Company to be materially different from any future results, performance, or achievements expressed or implied by such forward-looking statements. Such risks, uncertainties and assumptions include, among others, the following: our dependence on the successful development and market introduction of new products; our ability to successfully integrate Legerity and any businesses acquired in the future; our reliance on key personnel; any potential undisclosed liabilities associated with the Legerity acquisition; the potential adverse effect on critical reference design partners who may object to the Legerity acquisition; our ability to continue to operate profitably and generate positive cash flows in the future; our dependence on our foundry suppliers and third-party subcontractors; order cancellations and deferrals by our customers; and other factors referenced in our Annual Report on Form 20-F. Investors are encouraged to consider the risks detailed in this filing.

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Zarlink and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.

For further information:

Ed Goffin
Media Relations
613 270-7112
edward.goffin@zarlink.com

Mike McGinn
Investor Relations
613 270-7210
mike.mcginn@zarlink.com